Intel Planning On Ramming DRAM Into The Chip
Intel has been tinkering around with DRAM (Dynamic Random Access Memory) cells, reducing their size and getting rid of the capacitors that were necessary components of their tiny integrated circuit. In doing so, they may have demonstrated a way to remove the SRAM (Static Random Access Memory)cells from the processor and replace them with the simplified DRAM, greatly improving bandwith.
Intel said that it was able to fine tune its DRAM design and hit a physical clock of 2 GHz using a 65 nm manufacturing process. The resulting 2T-DRAM offers a stunning bandwidth of 128 GB/s. If Intel is successful to take the clock speed up to the level of its QX9770/9775 processors, the bandwidth would climb to 204.8 GB/s. In other words: Intel would gain more than a 10x improvement over its current L2 cache technology. More importantly: This approach would completely change the programming model since there are no longer any concerns over cache misses.
We don't know about you, but we'd be enthusiastic about a ten-fold improvement in anything at this point.
Intel said that it was able to fine tune its DRAM design and hit a physical clock of 2 GHz using a 65 nm manufacturing process. The resulting 2T-DRAM offers a stunning bandwidth of 128 GB/s. If Intel is successful to take the clock speed up to the level of its QX9770/9775 processors, the bandwidth would climb to 204.8 GB/s. In other words: Intel would gain more than a 10x improvement over its current L2 cache technology. More importantly: This approach would completely change the programming model since there are no longer any concerns over cache misses.
We don't know about you, but we'd be enthusiastic about a ten-fold improvement in anything at this point.
